Fowler-Nordheim tunneling current in thin gate-oxide MOS structures

Abstract

This thesis is an investigation of the Fowler-Nordheim tunneling current in thin oxide MOS structures. At high electric fields encountered in these structures, electrons can tunnel from the inversion layer of a p-type substrate or metal gate into the oxide. The transmission probability of electrons is influenced by the nature of the barrier of the tunneling interface. This thesis analyses physics of the FowlerNordheim tunneling current and arrives at these tunneling current-voltage characteristics of the structures. A novel F-N tunneling model based on the quantized electron in the lowest subband of inversion layer in the silicon substrate is presented to explain current-voltage characteristics of thin oxide, of the order of 11 nm, in a charge-free oxide. The generation rate in the space-charge region of underlying silicon is a strong function of doping concentration and minority carrier lifetime. This leads to a saturation of the tunneling current for the inversion layer. In Fowler-Nordheim tunneling, the shape of tunneling barrier depends on the trapped charge and its location in the oxide. The thesis investigates the lateral voltage shift of positive and negative J-Vg curves with the trapped charge, related to the charge-free case, using standard WKB calculation. The results are compared with voltage shifts using electrostatic consideration. Electrical characteristics of thin oxide MOS capacitor with gate oxide thickness in the range of 7.5-11 nm are investigated. The experimental J-Vg and C-V curves are analyzed and effects of high and low temperature annealing investigated. The effect of carrier generation limit in the substrate was investigated and compared with analytical prediction. These effects of charge trapping due to constant voltage stressing were also examined.