Abstract
Discrete wavelet transform (DWT) has shown great performance in digital image compression and denoising applications. It is the transformation used for source encoding in JPEG2000 still image compression standard and FBI wavelet scalar quantization. DWT is capable of fast image compression at less area and low power consumption. This paper presents 4-tap orthogonal DWT based on the residue number system. Hardware complexity reduction and design improvement are achieved by employing RNS for arithmetic operations and LUT sharing between low pass and high pass filters. The RNS based DWT is simulated and implemented on the Xilinx FPGA to verify the functionality and efficiency of the design.
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