Abstract
Raptor Galois fields (GF(2)) code and its next generation GF(256), are members of the rateless fountain codes family. Raptor codes have been a preferred technology for the forward error correction (FEC) at the application layer for several important consumer applications like Internet Protocol TV (IPTV). Raptor GF(256) code is proposed for reducing the redundant FEC information to a minimum. However, the improved coding performance comes at the expense of increased encoding and decoding complexity. On the other hand, graphics processing units (GPUs) have become a common place in the consumer market and are finding their way beyond graphics processing into general purpose computing. This paper investigates the suitability of GPU for Raptor GF(2) and GF(256) codes to process large block and symbol sizes in FEC transmission. The serial and parallel implementations of Raptor GF(2) and GF(256) codes are explored on the CPU and GPU platforms, respectively. Our work shows that efficient parallelization on the GPU improves the decoder performance significantly. To understand the performance bottlenecks of Raptor GF(2) and GF(256) codes on both the CPU and GPU platforms, the decoding speed is evaluated for different block and symbol sizes. Furthermore, simulations are performed for the practical realtime requirement in multimedia broadcast/multicast service (MBMS) and digital video broadcasting (DVB) for the bearer speed of 21 MHz in high speed downlink packet access (HSDPA) network <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sup> .
Published Version
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