Abstract
One-Transistor (1T) DRAMs are one of the potential replacements for conventional 1T-1C dynamic memory cells for future scaling of embedded and stand-alone memory architectures. In this work, a scaled (channel length 10nm) floating body 1T memory device architecture with ultra-thin body is studied, which uses a combined approach of a body raised storage region and separated source/drain regions having the role to reduce thermal and field enhanced band-to-band recombination. The physical mechanisms along the geometry and bias scaling are discussed in order to address the requirements of embedded or stand-alone applications. Two-dimensional device simulations show that, with proper optimization of the geometry and bias, the combined approach allows the increase of the retention time and of the programming window by more than one order of magnitude.
Highlights
From the early demonstration in 2001 [1], one-Transistor DRAMs (1T-DRAMs) have been largely investigated as a candidate to replace the conventional one transistor-one capacitor (1T-1C) cell
In Floating Body 1T-DRAMs (FB-DRAMs) [8,9,10,11,12,13,14,15], the information is encoded as non-equilibrium excess charge stored in the bulk of a Silicon
In FB-DRAMs, the excess charge is generated by non-equilibrium phenomena like Impaction Ionization (II) and/or Band to Band tunneling (BBT) during the WRITE operation
Summary
From the early demonstration in 2001 [1], one-Transistor DRAMs (1T-DRAMs) have been largely investigated as a candidate to replace the conventional one transistor-one capacitor (1T-1C) cell. Another advantage of low doping is a strongly reduced variability induced by random dopant fluctuations In this work it is proposed a FB-DRAM architecture which uses both concepts of a body raised region and source/drain separation, with particular emphasis on the former, as source/drain separation has been previously discussed by the same author in [15]. It is discussed how the presence of the body raised region improve the charge holding capability of the memory cell.
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