Abstract

Memory hole (MH) etching may be one of the most critical and challenging processes in three-dimensional flash processing and integration. As the holes get deep, hole critical dimensions (CDs) can vary significantly during the top-down etch processing, the hole shape can deviate from a round hole, and the centerline of the hole can deviate from a vertical line. These and other complex behaviors depend on not only the process conditions (chemistry, plasma power, bias, temperature, etc.) but also the process chamber history [e.g., radio frequency (RF) hours from preventative maintenance] and how the process chambers are conditioned. In addition, the etch behavior depends on the tier thickness (ONON or OPOP), materials, deposition conditions, and overall wafer topography and shapes. The etch behavior is further related to the die positions on the wafer (center or middle versus edge dies) and the position in the memory cell (close to the edge of the cell or near the center of the cell). To monitor and control the etch behavior, many metrology methods have been developed; these include the etch-back top-view scanning electron microscopy (SEM), tilt SEM, transmission electron microscopy (TEM), and high voltage scanning electron microscopy (HVSEM). These methods are time consuming, and some are destructive, but they have been deemed the ground truth for determining variations in MH etch processes. We report a methodology that combines optical scatterometry (SCD) and small-angle x-ray scatterometry measurements to provide reliable CD profile measurements while meeting the fast-turnaround sampling requirements of high-volume manufacturing.

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