Flash Lamp Annealed Polycrystalline Silicon TFT Dependence on Surface Morphology and the Back-Channel Material Interface

Abstract

This work studies the operation of polycrystalline silicon p-channel TFTs prepared via Flash Lamp Annealing (FLA). Silicon nitride was investigated as a back-channel interface layer to suppress void formation via dewetting of molten silicon. Predefined polygons of amorphous silicon were crystallized on display glass using single-pulse FLA exposure. Two distinct surface morphologies were realized within the same exposed region as a result of the underlying silicon nitride film and localized variation in the substrate thermal contact during PECVD deposition of amorphous silicon. While both resulting morphologies have polysilicon grains on micron scale, differences in TFT electrical behavior appear to coincide with differences in grain structure and boundary regions. The electrical results also indicate inferior electrical performance in response to the back-channel silicon nitride in comparison to results demonstrated on SiO2. Extracted parameters provide a quantitative assessment of the device operation as related to surface morphology and the back-channel material interface.