Fixed-Point MAP Decoding of Channel Codes

Massimo Rovini,Luca Fanucci,Giuseppe Gentile

doi:10.1155/2011/184635

Massimo Rovini, Luca Fanucci + Show 1 more

Open Access

https://doi.org/10.1155/2011/184635

Copy DOI

Abstract

This paper describes the fixed-point model of the maximum a posteriori (MAP) decoding algorithm of turbo and low-density parity-check (LDPC) codes, the most advanced channel codes adopted by modern communication systems for forward error correction (FEC). Fixed-point models of the decoding algorithms are developed in a unified framework based on the use of the Bahl-Cocke-Jelinek-Raviv (BCJR) algorithm. This approach aims at bridging the gap toward the design of a universal, multistandard decoder of channel codes, capable of supporting the two classes of codes and having reduced requirements in terms of silicon area and power consumption and so suitable to mobile applications. The developed models allow the identification of key parameters such as dynamic range and number of bits, whose impact on the error correction performance of the algorithm is of pivotal importance for the definition of the architectural tradeoffs between complexity and performance. This is done by taking the turbo and LDPC codes of two recent communication standards such asWiMAX and 3GPP-LTE as a reference benchmark for a mobile scenario and by analyzing their performance over additive white Gaussian noise (AWGN) channel for different values of the fixed-point parameters.

Highlights

Modern communication systems rely upon block channel codes to improve the reliability of the communication link, as a key facet to enhance the quality of service (QoS) to the final user
This paper describes the fixed-point model of the maximum a posteriori (MAP) decoding algorithm of turbo and low-density parity-check (LDPC) codes, the most advanced channel codes adopted by modern communication systems for forward error correction (FEC)
As a design constraint for a lowcomplexity implementation, the input LLRs λch were coded on Nλch = 5 bits while the forward/backward metrics were represented on a large number of bits (Nα = 16) so that the implementation loss (IL) is only due to the quantization of the inputs λch

Summary

Introduction

Modern communication systems rely upon block channel codes to improve the reliability of the communication link, as a key facet to enhance the quality of service (QoS) to the final user. LDPC codes were first designed by Gallager in the early 1960s, they were soon abandoned because of the inadequacy of the microelectronics technology, incapable of facing the complexity of the decoding algorithm It was only in the early 1990s that channel codes became popular, when Berrou et al, sustained by an already mature very large scale of integration (VLSI) technology, revealed the turbo decoding of PCCCs [3], soon extended to SCCCs [2, 4]. Floatingor fixed-point (16- or 32-bit) digital signal processing (DSP) units are inadequate to this aim and beside the known limitations in power consumption, they only meet the throughput requirements of the slowest standards and only with high degrees of parallelism (and so with increased power consumption) For this reason, this paper develops an accurate fixedpoint model of a decoder for turbo and LDPC codes, treated within a unified framework exploiting the inherent analogies between the two classes of codes and the related decoding algorithms.

Channel Codes

Maximum A Posteriori Decoding of Channels Codes

Fixed-Point Models

Simulation Results

Summary and Conclusion