First Evidence of Temporary Read Errors in TLC 3D-NAND Flash Memories Exiting From an Idle State

Cristian Zambelli,Rino Micheloni,Piero Olivo,Salvatrice Scommegna

doi:10.1109/jeds.2020.2965648

Cristian Zambelli, Rino Micheloni + Show 2 more

Open Access

https://doi.org/10.1109/jeds.2020.2965648

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Abstract

This paper presents a new reliability threat that affects 3D-NAND Flash memories when a read operation is performed exiting from an idle state. In particular, a temporary large increase of the fail bits count is reported for the layers read as first after a sequence of program/verify and a idle retention phase. The phenomenon, hereafter called Temporary Read Errors (TRE), is not due to a permanent change of cell threshold voltage between the program verify and the following read operations, but to its transient instability occurring during the idle phase and the first read operations performed on a block. The experimental analysis has been performed on off-the-shelf gigabit-array products to characterize the dependence on the memory operating conditions. The TRE is found to be strongly dependent on the page read, on the read temperature and on the time delay between the first and the second read after the idle state. To emphasize its negative impact at system-level, we have evaluated the induced performance drop on Solid State Drives architectures.

Highlights

The 3D-NAND Flash memory technology is a data storage stronghold in mobile and Solid State Drives (SSD) applications
The Temporary Read Errors (TRE) issue is due to a transient instability of cell VT occurring during the idle phase and the first read operations performed on a block
In the former test there is no perceivable difference in terms of fail bits between the block reads, whereas in the latter we appreciate a high fail bit count in the first layer of the block, with a general trend exposing the first block read as the one with the highest fail bits count

Summary

Introduction

The 3D-NAND Flash memory technology is a data storage stronghold in mobile and Solid State Drives (SSD) applications. Concerning reliability, several benchmarks showed that 3D-NAND Flash are better than state-of-the-art 2D NAND Flash [4], [5], [6], all the issues concerning the cells threshold voltage (VT ) instabilities like Random Telegraph Noise (RTN), cycling and retention failures are inherited to a large extent [7]. For the first time in 3D-NAND Flash gigabit array products, we show the presence of a reversible phenomenon, hereafter denoted as Temporary Read Errors (TRE). Such effect occurs during the read operation that impacts on the first group of cells read in a memory block when exiting from an idle state after a program/verify operation. The TRE issue is due to a transient instability of cell VT occurring during the idle phase and the first read operations performed on a block

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