Finite element mesh size effect for reliability assessment of WLCSP using different creep theories

Abstract

Rising with consumer electronics, mobile and wearable devices electronic packaging is developed with high power, high I/O, small size and good reliability performance. Among the various packages adopted by industry, Wafer Level Chip Size Packaging (WLCSP) and Ball Grid Array (BGA) possess characteristics mentioned above and therefore widely used in various kinds of devices. However, concerning different environments it will encounter, electrical packaging needs stronger reliability to address strict situations that maid damage and shorten device's life time which is mostly due to the failure of packaging's solder joint serving as an I/O of chip to function itself or communicate with others. As stated in many literatures, the electrical packaging's solder bump could been damaged due to the stress and strain induced by mismatch of coefficient of thermal expansion (CTE) between chip and substrate under thermal loading or Temperature Cycling Test(TCT), which is one of the reliability test that is required before reaching the market. Besides ameliorating the material employed on packaging, electrical packaging is also in need of good structural design to acquire a packaging form that can be able to possess better reliability performance and longer cycling life to be more durable. Taking into consideration that assessing electrical reliability is generally time and fund consuming, simulation can be a decent alternative if it is able to analyze electrical packaging accurately via finite element method. In addition, simulation benefits companies much shorter time in research, allowing product to be more competitive when it is able to enter market with a shorter research and development period. In recent years, the loading of TCT is set to be harsher, failing the test specimens at a faster pace to reduce reliability test time. According to JEDEC standard, regular test temperature ranges from -40°C to 125°C is adopted in this research. During the session of accelerated temperature cycling test, temperature often exceeds one third of solder's melting temperature, triggering the creep behavior to be more obvious and considerable as the creep strain is accumulated to be an amount that is not ignorable. With respect to finite element algorithm, element size used in finite element method can significantly interferes simulation result. It causes considerable deviation of packaging life prediction between larger and smaller element when they are applied on TCT simulation. As a result, finding the suitable element size to various kinds of packaging is essential when the accurate simulation result is required to access or develop a packaging. In summary, the purpose of this research is finding the appropriate element size matching with experimental cycling life by comparing the response of several WLCSP sustaining to the loading of accelerated temperature cycling test. All simulations are conduct with Anand and modified Anand.