Abstract

In this work, a 14-nm-node Replacement Metal Gate (RMG or “Gate Last”) high-k Last FinFET flow, compatible with the high thermal budget required during a DRAM fabrication process is demonstrated for the first time, with proven functionality of SRAM and Ring Oscillators. An extensive analysis is conducted for the assessment and optimization of the nMOS gate stack. A thermally stable nMOS gate stack featuring Lanthanum (La)-dipole and TiN/TiAl/TiN Work Function Metals (WFMs) is proposed to achieve sub 0.2 V nMOS threshold voltage $(V_{t})$.

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