Low-power DRAM-compatible Replacement Gate High-k/Metal Gate stacks

Abstract

In this paper, the feasibility of High-k/Metal Gate (HKMG) Replacement Metal Gate (RMG) stacks for low power DRAM compatible transistors is assessed. It is shown that traditional RMG gate stacks cannot be used because of the additional anneal needed in a DRAM process. New solutions are developed, and a PMOS stack HfO 2 /TiN with TiN deposited in three times combined with Work Function metal oxidations is demonstrated, featuring a Work Function of 4.95 eV. On the NMOS side, a new solution based on the use of oxidized Ta as a diffusion barrier is proposed, and a HfO 2 /TiN/Ta/TiAl/TiN/TiN gate stack featuring an aggressive Work Function of 4.35 eV (allowing a Work Function separation of 600 mV between NMOS and PMOS) is demonstrated.