FinFET based 2-4 and 4-16 mixed line decoder for low power and high speed application

Abstract

Back end designing in VLSI is a very important topic of research as the need of low power devices is in high demand, it is necessary to take action on circuits to reduce the power consumption from initially used conventional circuits. Decoder is an important circuit in the field of electronics and communication. Initially, CMOS logic is used for making decoder which utilizes 20 transistors and in mixed logic same logic can be created using 14 or 15 transistor; but, power consumption is still high. In this work, a FinFET based mixed logic line decoders for low power and high speed applications has been proposed. FinFET shows better results in terms of parameters such as Average Power Consumption, Delay. 2 to 4 and 4 to 16 decoders are made using MOSFET and FinFET Technology in 32nm. The decoders are compared on the basis of evaluation parameters and it is seen that in both configuration FinFET based circuits perform better than MOSFET based conventional circuits.