Abstract
AbstractThis paper presents a new FinFET 4T‐SRAM that is operated with differential write and single‐end read mode, in the near‐threshold region. To improve the read margin and the write stability, a 3T read/write assist circuit is added to the proposed SRAM. From the HSPICE simulation results in 20‐nm predictive technology model (PTM), the proposed circuit has the same static noise margin (SNM), a shorter read/write time and smaller energy dissipation compared to conventional circuits.
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