Filtering DC Bias in a Hard-Limited Radar Signal Processor Using Code Imbalance

Abstract

A radar signal processor subchain containing a pulse compression module employing binary $\pm 1$ phase codes is studied in an effort to understand the behavior of the output mean and variance as functions of phase code imbalance, in noise-limited environments. It is a relatively simple subchain consisting of an R/Theta limiter, a pulse compressor using a length- $N$ phase code for match filtering, scaling by $1/N$ , and a squarer (also known as $I^2+Q^2$ ). The input to this system is a sampled input string assumed to be formed of a small dc bias with added two-dimensional Gaussian noise. The output of this system is studied for a range of values of the pulse compression code imbalance. Imbalance is the difference between the number of 1 and $-1$ elements in the binary phase code. A nonzero imbalance is sometimes a cause for concern, since the pulse compression dc gain is proportional to the code imbalance. Hence, the dc gain might be expected to yield a nonzero component at the output, resulting in an increased risk of false alarms on a radar return comprised of noise alone. However, we show that for imbalance of $\pm \sqrt{N}$ , any contribution from the dc bias is nearly eliminated. When $N$ is a perfect square, dc bias is completely eliminated, in theory at least. Analytical formulae are provided, along with simulation results for pulse compression code length $N=512$ .