Filamentary and interface switching of CMOS-compatible Ta2O5 memristor for non-volatile memory and synaptic devices

Abstract

To successively implement synaptic memristor device in the neuromorphic computing system, it is essential to perform a variety of synaptic characteristics with low power consumption and have complementary metal-oxidesemiconductor (CMOS) compatibility. In this work, we experimentally demonstrate two types of interface and filamentary resistive switching behaviors for Ni/Ta2O5/Si device by controlling electroforming process. The typical bipolar operation with filamentary switching is observed with electroforming for non-volatile memory properties such as reliable retention (>104) and high on/off ratio (>103). To achieve the synaptic characteristics such as paired pulse facilitation (PPF), potentiation, and depression, the gradual switching with low current without electroforming is used. We evaluate pattern recognition accuracy simulation from Fashion MNIST dataset by using a 3-layer neural network (784 × 512 × 10) and synaptic weight of Ni/Ta2O5/Si device. Furthermore, density of states, isosurface charge density and electron localization function plots confirm the conductivity and charge formation of Ta2O5 structure with and without oxygen vacancies. Theoretical work results reveal that the resistive switching characteristics are due to charge accumulation/depletion near the defects sites (oxygen vacancy). All things considered, the Ni/Ta2O5/p++-Si memristor could offer the flexibility for both non-volatile memory and synaptic devices by simply controlling electroforming.