Field-induced mobility degradation in pentacene thin-film transistors

Abstract

Pentacene-based organic thin-field transistors (OTFTs) with bottom-gate, top-contact architecture were fabricated on alumina substrates. The devices were divided into two sets, depending on whether pentacene was deposited on bare alumina or on alumina modified with a fatty acid self-assembled monolayer (SAM). Previous analysis have shown that the modification of alumina with SAMs result in a substantial decrease of the size of the grains in hte polycrystalline films. Careful parameters extraction, including an original determination of the threshold voltage, and contact resistance extraction through the transfer line method (TLM), allowed us to estimate the gate-voltage dependent mobility in both series. The mobility is found to first increase at low bias, and then decrease at higher gate voltage (mobility degradation). The latter behavior is explained through an estimation of the distribution of charges across the accumulation layer, in which the pentacene film is modeled as a stack of dielectric layers, the distribution being calculated using basic equations of electrostatics and thermodynamics. A good agreement was found when the mobility in the layer next to the insulator was assumed to be negligible as compared to that in the bulk of the film. The initial rise of the mobility is interpreted in terms of multiple trap and release (MTR) with a distribution of traps located in the grain boundaries. Interestingly, the mobility corrected for both contact resistance and mobility degradation is found around 3 cm2/V s for pentacene deposited on bare alumina, and 5 cm2/V s when pentacene is deposited on SAM modified alumina. We conclude that the smaller grains grown on modified alumina are more regular, and hence less defective, than the larger grains deposited on bare alumina.