Abstract

Purpose The Kirkendall void had been a well-known issue for long-term reliability of semiconductor interconnects; while even the KVs exist at the interfaces of Cu and Sn, it may still be able to pass the condition of unbias long-term reliability testing, especially for 2,000 cycles of temperature cycling test and 2,000 h of high temperature storage. A large number of KVs were observed after 200 cycles of temperature cycling test at the intermetallic Cu3Sn layer which locate between the intermetallic Cu6Sn5 and Cu layers. These kinds of voids will grow proportional with the aging time at the initial stage. This paper aims to compare various IMC thickness as a function of stress test, the Cu3Sn and Cu6Sn5 do affected seriously by heat, but Ni3Sn4 is not affected by heat or moisture. Design/methodology/approach The package is the design in the flip chip-chip scale package with bumping process and assembly. The package was put in reliability stress test that followed AEC-Q100 automotive criteria and recorded the IMC growing morphology. Findings The Cu6Sn5 intermetallic compound is the most sensitive to continuous heat which grows from 3 to 10 µm at high temperature storage 2,000 h testing, and the second is Cu3Sn IMC. Cu6Sn5 IMC will convert to Cu3Sn IMC at initial stage, and then Kirkendall void will be found at the interface of Cu and Cu3Sn IMC, which has quality concerning issue if the void’s density grows up. The first phase to form and grow into observable thickness for Ni and lead-free interface is Ni3Sn4 IMC, and the thickness has little relationship to the environmental stress, as no IMC thickness variation between TCT, uHAST and HTSL stress test. The more the Sn exists, the thicker Ni3Sn4 IMC will be derived from this experimental finding compare the Cu/Ni/SnAg cell and Ni/SnAg cell. Research limitations/implications The research found that FCCSP can pass automotive criteria that follow AEC-Q100, which give the confidence for upgrading the package type with higher efficiency and complexities of the pin design. Practical implications This result will impact to the future automotive package, how to choose the best package methodology and what is the way to do the package. The authors can understand the tolerance for the kind of flip chip package, and the bump structure is then applied for high-end technology. Originality/value The overall three kinds of bump structures, Cu/Ni/SnAg, Cu/SnAg and Ni/SnAg, were taken into consideration, and the IMC growing morphology had been recorded. Also, the IMC had changed during the environmental stress, and KV formation was reserved.

Highlights

  • The automotive integrated circuit (IC) market will outgrow by two or even three times of the existing IC market

  • Market researchers predict that automotive semiconductors will occupy more than 15 per cent of the total semiconductor market by 2025, especially for those analog IC of intelligence vehicle

  • Flip chip package can do more complex design, as the transition outset will not be limited at outer ring but full die area. wire bonding, the flip chip assembly requires the media-like pillar or solder bump to link signal between the chips and substrate; the interconnection of the microstructural evolution do associate with effectiveness of reliability

Read more

Summary

Introduction

The automotive integrated circuit (IC) market will outgrow by two or even three times of the existing IC market. It is noteworthy that flip chip package becomes the automotive devices solution gradually because of the higher efficiency and complexities of the pin design. More and more design houses are moving toward flip chip or wafer-level fan-out package design for automotive infotainment, radar and GPS application. These changes will enable automobiles to become reliable and intelligent, so as let the packaging industry prioritize the development of advanced package for the generation of automotive market requirements. Focusing on the semiconductor industry, more and more devices turn their assembly form from legacy wire bonding to flip chip owing to the higher performance with shorter electrical signal transition path. Flip chip package can do more complex design, as the transition outset will not be limited at outer ring but full die area. wire bonding, the flip chip assembly requires the media-like pillar or solder bump to link signal between the chips and substrate; the interconnection of the microstructural evolution do associate with effectiveness of reliability

Objectives
Results
Conclusion
Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call