Fault-simulation based design error diagnosis for sequential circuits

Abstract

This paper addresses the problem of locating design errors in a sequential circuit. For single-error circuits, we consider a signal f as a potential error source only if the circuit can be completely rectified by re-synthesizing f (i.e., changing the function of signal f). In order to handle larger circuits, we do not rely on Binary Decision Diagram. Instead, we search for potential error sources by a modified sequential fault simulation process. The main contributions of this paper are two-fold: (1) we derive the necessary and sufficient condition of whether an erroneous input sequence (i.e., an input sequence producing erroneous responses) can be corrected by changing the function of a particular internal signal; and (2) we propose a modified fault simulation procedure to check this condition. Our approach does not rely on any error model, and thus, is suitable for general types of errors. Furthermore, it can be easily extended to identify multiple errors. Experimental results on ISCAS89 benchmark circuits are presented to demonstrate its capability.