Abstract
Single-chip multiprocessor (CMP) combined with the fault-tolerant (FT) techniques offers an ideal architecture to achieve high availability on the basis of sustaining high computing performance. FT design of a single-chip multiprocessor is described, including the techniques from hardware redundancy to software support and firmware strategy. The design aims at masking the influences of errors and automatically correcting the system states.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
