Fault-aware routing approach for mesh-based Network-on-Chip architecture

Abstract

Aggressive communication among cores in multi-core architectures leads to excessive workload on the components which often degrades the normal functionality and induces faults. Network-on-Chip (NoC) also inherits the phenomenon of fault occurrence in multi-core architectures that affect the links and routers of the communication infrastructure. In this work, we emphasize on faults that occur in NoC routers and propose a fault-aware routing approach to mitigate them. The proposed routing approach selects the routing path for flits depending on the health status of the neighboring routers. Furthermore, a router cool-off mechanism is introduced so that the routers that have reached the workload threshold can be reused after some cool-off period. A router micro-architecture is also presented to support the fault-aware routing approach. While comparing with the state-of-art works, the proposed methodology achieves both zero fault occurrence and significant improvement in throughput with negligible delay overhead.