Fast-Locking Burst-Mode Clock and Data Recovery for Parallel VCSEL-Based Optical Link Receivers

Abstract

A burst-mode clock-and-data-recovery (CDR) system for a multi-channel vertical-cavity surface-emitting laser (VCSEL)-based non-return-to-zero (NRZ) optical link’s quarter-rate receivers is presented, that utilizes proxy timing recovery for fast turn-on time. The proxy timing recovery scheme takes advantage of correlated data jitter over parallel optical lanes typically deployed in a data center. Rapid timing recovery of the burst-mode channel is enabled by incrementing/decrementing its phase rotator (PR) control code during idle periods using phase updates from an always-active channel in the link. This work also presents circuit-design techniques to reduce power dissipation during idle times while still enabling fast turn-on time. Simulated in 65 nm CMOS technology, the proposed CDR consumes only 19.5 mW per channel while operating at 10 Gbps/ch and 0.58 mW during its idle-state. Simulation results are presented for the turn-on time with the proposed technique and compared against the turn-on time of a conventional receiver. The proposed technique allows the CDR to lock within 26 unit intervals (UIs) from when it is powered on irrespective of a 1000 ppm frequency offset between the incoming data and the CDR’s reference clock. The complete CDR of each channel occupies an area of 0.045 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The proposed scheme introduces only 1.3 % of area and 2.6 % of on-state power overhead while reducing idle-time power dissipation by 97 %.