Abstract
Inversion over GF(2m) is crucial for cryptographic applications such as elliptic curve cryptography. The commonly used Itoh-Tsujii algorithm (ITA) computes the inversion by an entirely sequential process consisting of multiplications and squarings. In this paper, we first propose a modified ITA algorithm (MITA) for inversion with polynomial basis (PB). The MITA reduces the required clock cycles of ITA inversion by enabling the parallel computation between part of multiplications and squarings. Furthermore, we generalize the MITA to inversion with arbitrary addition chains. Several criteria are proposed to find the optimal addition chains (OACs) leading to the fastest inverters with given hardware resources. Implemented on Xilinx Virtex-4 FPGA, the proposed inversion architecture with a digit-serial multiplier achieves averagely 61% faster speed with 69% less resources than previous designs with normal basis. Using a fully combinational multiplier, the OAC inverters outperform existing PB-based designs by at least 60.9%, 35.1%, 94.9% for m = 163, 233, 283 respectively in terms of area-time product.
Published Version
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