Fabrication of Superconducting YBa2Cu3O7\u2212x Thin Films on Si Wafer via YSZ/CeO2 buffer layers

Y Uzun,I Avci,O Kuran

doi:10.1007/s10948-016-3846-y

Y Uzun, I Avci + Show 1 more

Open Access

https://doi.org/10.1007/s10948-016-3846-y

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Abstract

Fabrication of reproducible superconducting YBa2Cu3O7−x (YBCO) thin films with Tc values above 85 K on Si wafers has been realized by optimizing the thin film deposition process. Prior to the deposition of YBCO thin film on (100) p-type Si wafer, YSZ and CeO2 thin films were deposited as buffer layers by RF magnetron sputtering, and subsequently, YBCO thin film was deposited by dc magnetron sputtering. The deposition parameters such as substrate temperature, process gas pressure, Ar/O2 ratio, and power density were optimized for all layers in order to enhance the whole structure to prevent microcrack formation caused by misfits in crystal lattice parameters and thermal expansion coefficients between Si/YSZ/CeO2 and YBCO. Structural analyses were performed on YSZ and CeO2 layers, and electrical and magnetic measurements were carried out on a YBCO layer by employing XRD, SEM, resistance vs. temperature, and AC magnetic susceptibility vs. temperature measurements, respectively. The YBCO layer was also patterned as microbridges in order to test the durability of the whole Si/YSZ/CeO2/YBCO structure during the standard photolithography and wet etching process commonly used in device applications.

Highlights

In microelectronic technologies, Si wafers have been intensively used as standard substrate materials for microfabrication of semiconductor devices for decades because of their several important advantages such as low cost, chemical resistance, and good crystalline structure besides their controllable electronic properties such as intentionally doping as p- or n-type [1]
Superconducting YBCO thin films were fabricated on silicon substrates in the form of YBCO/CeO2/YSZ/Si multilayer structure
CeO2/YSZ bilayer was deposited on Si as buffer layers in order to minimize mismatch on lattice parameters and thermal expansion coefficients between YBCO and CeO2/YSZ/Si stack

Summary

Introduction

Si wafers have been intensively used as standard substrate materials for microfabrication of semiconductor devices for decades because of their several important advantages such as low cost, chemical resistance, and good crystalline structure besides their controllable electronic properties such as intentionally doping as p- or n-type [1]. Since the hightemperature superconductor (HTS) materials become superconductor above the liquid nitrogen temperature, which is quite cheap and easy to handle, it would be very useful to fabricate HTS devices on Si by bringing the main advantages of the HTS materials and Si substrates together [3]. This became an attractive research field for many research groups

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