Fabrication of Schottky barrier MOSFETs using self-assembly CoSi 2 nanopatterning and spacer gate technologies

Abstract

A self-assembly patterning method for generation of epitaxial CoSi 2 nanostructures was used to fabricate 50 nm channel-length MOSFETs. The transistors have either a symmetric structure with Schottky source and drain or an asymmetric structure with n +-source and Schottky drain. The patterning technique is based on anisotropic diffusion of Co/Si atoms in a strain field during rapid thermal oxidation. The strain field is generated along the edges of a mask consisting of 20 nm SiO 2 and 300 nm Si 3N 4. During rapid thermal oxinitridation (RTON) of the masked silicide structure, a well-defined separation of the silicide layer forms along the edge of the mask. These highly uniform gaps define the channel region of the fabricated device. The separated silicide layers act as metal source and drain. A poly-Si spacer was used as the gate contact. The asymmetric transistor was fabricated by ion implantation into the unprotected CoSi 2 layer and a subsequent out-diffusion process to form the n +-source. I–V characteristics of both the symmetric and asymmetric transistor structures have been investigated.