Fabrication of SB-MOSFETs on SOI Substrate Using Ni Silicide Containing Er Interlayer

Abstract

SB-MOSFETs were fabricated on SOI substrates by applying novel Schottky barrier height modulation technique of Er interlayer insertion at the interface of Ni/Si prior to Ni silicidation process. It was found that Er interlayer insertion lowered Schottky barrier height for electrons while no significant increase of the resistivity in the Er interlayer inserted films compare to pure Ni silicide films in the annealing temperature range of 500-750 oC. Effects of Er insertion to the transistor characteristics of SOI SB-MOSFETs are also discussed.