Fabrication of dynamic oxide semiconductor random access memory with 3.9 fF storage capacitance and greater than 1 h retention by using c-axis aligned crystalline oxide semiconductor transistor with L of 60 nm

Abstract

A dynamic oxide semiconductor random access memory (DOSRAM) array that achieves reduction in storage capacitance (Cs) and decrease in refresh rate has been fabricated by using a c-axis aligned crystalline oxide semiconductor (CAAC-OS) transistor (L = 60 nm) with an extremely low off-state current. We have confirmed that this array, composed of cells that include a CAAC-OS transistor with W/L = 40 nm/60 nm using InGaZnO and a 3.9 fF storage capacitor, operates with write and read times of 5 ns. Therefore, DOSRAM can ensure sufficient Cs while maintaining operation speed comparable to that of dynamic random access memory (DRAM). We have found that the read signal voltage of DOSRAM is changed by approximately 30 mV after 1 h at 85 °C. Thus, DOSRAM is a promising replacement for DRAM.