Fabrication of 4H-SiC lateral double implanted MOSFET on an on-axis semi-insulating substrate without using epi-layer

Abstract

4H-SiC lateral double implanted metal–oxide–semiconductor field effect transistors (LDIMOSFET) were fabricated on on-axis semi-insulating SiC substrates without using an epi-layer. The LDIMOSFET adopted a current path layer (CPL), which was formed by ion-implantation. The CPL works as a drift region between gate and drain. By using on-axis semi-insulating substrate and optimized CPL parameters, breakdown voltage (BV) of 1093 V and specific on-resistance (Ron,sp) of 89.8 mΩ·cm2 were obtained in devices with 20 µm long CPL. Experimentally extracted field-effect channel mobility was 21.7 cm2·V−1·s−1 and the figure-of-merit (BV2/Ron,sp) was 13.3 MW/cm2.