Fabrication and Optimization of High Aspect Ratio Through-Silicon-Vias Electroplating for 3D Inductor.

Haiwang Li,Tiantong Xu,Jiasi Liu,Xiao Tan,Jingchao Xia,Zhi Tao

doi:10.3390/mi9100528

Abstract

In this study, the filling process of high aspect ratio through-silicon-vias (TSVs) under dense conditions using the electroplating method was efficiently achieved and optimized. Pulsed power was used as the experimental power source and the electroplating solution was prepared with various additive concentrations. Designed control variable experiments were conducted to determine the optimized method. In the control variable experiments, the relationship of multiple experimental variables, including current density (0.25–2 A/dm2), additive concentration (0.5–2 mL/L), and different shapes of TSVs (circle, oral, and square), were systematically analyzed. Considering the electroplating speed and quality, the influence of different factors on experimental results and the optimized parameters were determined. The results showed that increasing current density improved the electroplating speed but decreased the quality. Additives worked well, whereas their concentrations were controlled within a suitable range. The TSV shape also influenced the electroplating result. When the current density was 1.5 A/dm2 and the additive concentration was 1 mL/L, the TSV filling was relatively better. With the optimized parameters, 500-μm-deep TSVs with a high aspect ratio of 10:1 were fully filled in 20 h, and the via density reached 70/mm2. Finally, optimized parameters were adopted, and the electroplating of 1000-μm-deep TSVs with a diameter of 100 μm was completed in 45 h, which is the deepest and smallest through which a three-dimensional inductor has ever been successfully fabricated.

Highlights

With the requirements of reduced feature size and increased transistor performance for semiconductor technology, three-dimensional (3D) integration technology—using through-silicon-vias (TSVs) to realize the interconnection of multi-stacked chips—has emerged as a promising technology [1,2,3,4]. 3D integration technology can produce shorter interconnections in the vertical direction, resulting in a faster response and better performance of integrated circuits (ICs).High-aspect-ratio TSVs applied in electronic devices are light, thin, and small, having an important role in MEMS devices, including MEMS sensors, 3D inductors, micro-motors, and micro-converters [5,6,7]
Copper electroplating is extensively used in high-aspect-ratio TSV interconnections due to the lower resistivity and higher resistance for electromigration, which has been reported in many studies, and has become a relatively mature method [12]
The results show that the TSV bottom parts failed to close because of the tiny current promotion with a current density under 0.25 A/dm2 [29] ith increasing current density, the electroplating speed increased approximately linearly with the current density in the range of 0.5 to 1.75 A/dm2

Summary

Introduction

With the requirements of reduced feature size and increased transistor performance for semiconductor technology, three-dimensional (3D) integration technology—using through-silicon-vias (TSVs) to realize the interconnection of multi-stacked chips—has emerged as a promising technology [1,2,3,4]. 3D integration technology can produce shorter interconnections in the vertical direction, resulting in a faster response and better performance of integrated circuits (ICs).High-aspect-ratio TSVs applied in electronic devices are light, thin, and small, having an important role in MEMS (micro-electro-mechanical system) devices, including MEMS sensors, 3D inductors, micro-motors, and micro-converters [5,6,7]. Since the development trend of miniaturization and improving efficiency for current electric products, increasing TSVs conduction in a smaller area, using high-density TSVs, is necessary [8,9]. High-density TSVs help reduce the size of MEMS devices and increase power density, promoting the development and performance improvement of MEMS devices [10,11]. Copper electroplating is extensively used in high-aspect-ratio TSV interconnections due to the lower resistivity and higher resistance for electromigration, which has been reported in many studies, and has become a relatively mature method [12]. Achieving complete filling in high-aspect-ratio TSVs remains a challenge, and so has become a research focus. Numerous methods have been proposed to achieve full copper filling in high-aspect-ratio TSVs [13,14,15]

Methods

Results

Conclusion