Abstract
In capacitance-voltage (C-V) measurements, frequency dispersion in high-k dielectrics is often observed. The frequency dependence of the dielectric constant (k-value), that is the intrinsic frequency dispersion, could not be assessed before suppressing the effects of extrinsic frequency dispersion, such as the effects of the lossy interfacial layer (between the high-k thin film and silicon substrate) and the parasitic effects. The effect of the lossy interfacial layer on frequency dispersion was investigated and modeled based on a dual frequency technique. The significance of parasitic effects (including series resistance and the back metal contact of the metal-oxide-semiconductor (MOS) capacitor) on frequency dispersion was also studied. The effect of surface roughness on frequency dispersion is also discussed. After taking extrinsic frequency dispersion into account, the relaxation behavior can be modeled using the Curie-von Schweidler (CS) law, the Kohlrausch-Williams-Watts (KWW) relationship and the Havriliak-Negami (HN) relationship. Dielectric relaxation mechanisms are also discussed.
Highlights
With increasing demand for higher speed and device density, the device dimensions in Si complementary-metal-oxide-semiconductor (CMOS) based integration circuits are continually being scaled down, following what is termed as Moore’s law
As the thickness of SiO2 gate dielectric thin films used in metal-oxide-semiconductor (MOS) devices was reduced towards about 1 nm, the gate leakage current level became unacceptable
The existence of frequency dispersion in the LaAlO3 sample is discussed in Section 3.1.2, which is mainly due to the effect of the lossy interfacial layer between the high-k thin film and silicon substrate on the MOS capacitors (MOSC)
Summary
With increasing demand for higher speed and device density, the device dimensions in Si complementary-metal-oxide-semiconductor (CMOS) based integration circuits are continually being scaled down, following what is termed as Moore’s law. As the thickness of SiO2 gate dielectric thin films used in metal-oxide-semiconductor (MOS) devices was reduced towards about 1 nm, the gate leakage current level became unacceptable. The extrinsic and intrinsic causes of frequency dispersion during C-V or C-f (capacitance-frequency) measurements in high-k thin films were investigated. The corrected capacitance was provided following related models Another extrinsic cause of frequency dispersion, lossy interfacial layer effect, on high-k MOS capacitances was investigated for zirconium oxides and a four-element circuit model was introduced. LaxZr1−xO2−δ thin film and CexZr1−xO2−δ thin film led to the conclusion that surface roughness was not responsible for the observed frequency dispersion for the thick high-k dielectric thin films. After taking into account all extrinsic causes of frequency dispersion mentioned above, the intrinsic effect (dielectric relaxation) of high-k dielectric thin films arose and several dielectric relaxation models were discussed. The causes of the dielectric relaxation were discussed in terms of this observation
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