Abstract
An optimized doping process is used to achieve extremely-low threshold voltage (ELVT) FinFETs for low-power mmWave applications based on 12nm node technology platform. With the VTH ≈ 100mV ELVT FinFET shows 15% IEFF improvement at the same VDD compared to its super-low threshold voltage (SLVT) counterpart, while mismatch and reliability performances are comparable. FT/FMAX of 305GHz/ 315GHz and comparable Maximum Stable Gain (MSG) to SLVT FinFET gives ELVT FinFET an advantage for mmWave 5G low-power applications. Local oscillator (LO) chain blocks are investigated as a circuit level example to confirm the benefits of ELVT FinFET. An optimized LO transmission Line (TL) driver using ELVT FinFETs results in 9% and 8% reduction in VDD and power consumption respectively at the same phase-noise (PN) level as the SLVT based design. If operated at the same V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> of 0.525V ELVT FinFET can improve the VCO Figure of Merit (FOMVCO) by 2.8dB.
Highlights
RELIABILITYTo fully evaluate the reliability of extremely-low threshold voltage (ELVT) FinFETs Bias Temperature Instability (BTI) and Hot Carrier Injection (HCI) reliability tests have been performed on super-low threshold voltage (SLVT) and ELVT transistors by means of Constant Voltage Stress (CVS) where the stress was regularly interrupted to monitor the device performance parameters (VTH for BTI and IDSAT for HCI) over a stress time up to 104 seconds [13]
Approaching sub-6GHz and mmWave 5G transition will transform our world to an environment in which everyone is connected to everything at all times
While the extremely-low threshold voltage (ELVT) device can be implemented through minor process integration changes with no additional mask, i.e., minimum extra cost it can deliver better DC and RF performance compared to the super-low threshold voltage (SLVT) FinFET for specific sub-6GHz and mmWave 5G transceiver applications
Summary
To fully evaluate the reliability of ELVT FinFETs Bias Temperature Instability (BTI) and Hot Carrier Injection (HCI) reliability tests have been performed on SLVT and ELVT transistors by means of Constant Voltage Stress (CVS) where the stress was regularly interrupted to monitor the device performance parameters (VTH for BTI and IDSAT for HCI) over a stress time up to 104 seconds [13]. Time slope does not depend on the threshold voltage flavor meaning for BTI and HCI the underlying physical degradation mechanism is similar for both devices. With regards to absolute level of degradation, the ELVT device shows improved or comparable BTI and HCI degradation compared to the SLVT case for NFET and PFET (see Fig. 3). It is concluded from the presented data that counter-doping has a negligible effect on either the gate vertical electric field that controls BTI or on the lateral electric field in the channel that controls HCI. ELVT PFET shows no degradation in mismatch due to less movement of larger BF2 dopants
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