Abstract

Single-event upset sensitivity of 55- and 180-nm SRAM devices with error detection and correction (EDAC) exhibits obvious ion flux and scrubbing time dependence. On-orbit soft error rates (SERs) of EDAC SRAM devices are extrapolated from accelerator heavy-ion data and compared with rectangular parallelepiped-predicted SER, based on an experimentally verified formula. It is found that on-orbit SER of EDAC SRAM is contributed by both the memory array and the EDAC circuitry. This method can guide the optimization of EDAC SRAM hardening strategy and also the on-orbit hardness assurance.

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