Extraction of Drain Current Thermal Noise in a 28 nm High-<inline-formula> <tex-math notation="LaTeX">${k}$ </tex-math> </inline-formula>/Metal Gate RF CMOS Technology

Abstract

This paper investigates RF noise in a 28-nm replacement metal gate RF CMOS technology. The gate resistance is shown to be limited by interfacial resistance in metal gate stack. Intrinsic noise factor $\gamma _{\mathrm{ gd0}}^{\mathrm{ int}} ={S}_{\mathrm{ id}}^{\mathrm{ int}}/\text{4kTg}_{\mathrm{ d0}}$ and shot noise suppression factor ${k}_{s}^{\mathrm{ int}} = {S}_{\mathrm{ id}}^{\mathrm{ int}}/\text{2qI}_{\mathrm{ DS}}$ are extracted. $\text{g}_{\mathrm{ d0}}$ from S-parameters is shown to be more accurate than from dc ${I}$ – ${V}$ . $\gamma _{\mathrm{ gd0}}^{\mathrm{ int}}$ remains less than 2, despite a large increase from 90-nm gate length, as well as a much stronger increase with ${V}_{\mathrm{ DS}}$ . ${k}_{s}^{\mathrm{ int}}$ shows a decrease on ${V}_{\mathrm{ GS}}$ and a weak increase on ${V}_{\mathrm{ DS}}$ . Of all four noise parameters, noise resistance plays the most significant role in intrinsic drain current noise extraction. Extrinsic and intrinsic noise resistance can be modeled by simple expressions.