Abstract

The parasitic effect inside through-silicon via (TSV) packaging under radio frequency (RF) operation may cause abnormal signals in circuit performance. On the bases of a self-developed deembedding technique, we investigated the high-frequency characteristics of a typical TSV structure through direct measurements. To this end, a silicon substrate layout was first designed and constructed, followed by packaging mounting to build a suitable setting for RF measurements. Behaviors up to 3 GHz on different circuit segments in an actual TSV packaging were then measured directly by using an RF-inductance, capacitance, and resistance (LCR) meter, and R, L, and impedance (Z) data for test structures were then extracted and compared with those reported in the literature. To study the environmental effect on the RF properties of the TSV test samples, we monitored behaviors during a temperature-humidity reliability test.

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