Abstract

Spiking neural networks (SNNs) employing memristive synapses are capable of life-long online learning. Because of their ability to process and classify large amounts of data in real-time using compact and low-power electronic systems, they promise a substantial technology breakthrough. However, the critical issue that memristor-based SNNs have to face is the fundamental limitation in their memory capacity due to finite resolution of the synaptic elements, which leads to the replacement of old memories with new ones and to a finite memory lifetime. In this study we demonstrate that the nonlinear conductance dynamics of memristive devices can be exploited to improve the memory lifetime of a network. The network is simulated on the basis of a spiking neuron model of mixed-signal digital-analogue sub-threshold neuromorphic CMOS circuits, and on memristive synapse models derived from the experimental nonlinear conductance dynamics of resistive memory devices when stimulated by trains of identical pulses. The network learning circuits implement a spike-based plasticity rule compatible with both spike-timing and rate-based learning rules. In order to get an insight on the memory lifetime of the network, we analyse the learning dynamics in the context of a classical benchmark of neural network learning, that is hand-written digit classification. In the proposed architecture, the memory lifetime and the performance of the network are improved for memristive synapses with nonlinear dynamics with respect to linear synapses with similar resolution. These results demonstrate the importance of following holistic approaches that combine the study of theoretical learning models with the development of neuromorphic CMOS SNNs with memristive devices used to implement life-long on-chip learning.

Highlights

  • The critical issue that memristor-based SNNs have to face is the fundamental limitation in their memory capacity due to finite resolution of the synaptic elements, which leads to the replacement of old memories with new ones and to a finite memory lifetime

  • In this study we demonstrate that the nonlinear conductance dynamics of memristive devices can be exploited to improve the memory lifetime of a network

  • We find that memristor soft-bound dynamics results in improved SNN memory lifetime and capacity and slower learning speed, ensuring slower forgetting and higher and more robust recognition rate in comparison to linear synapses with similar resolution

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Summary

Introduction

Nanotechnology 30 (2019) 015102 long online learning features [1] Hardware implementations of these networks can lead to the construction of efficient neuromorphic computing systems able to extract useful information from large amount of unstructured data in realtime [2]. These architectures represent a radical departure from the standard machine learning and information processing systems based on the von Neumann architecture [2, 3]. On the other hand, which is even more fundamental, the finite resolution of a generic hardware synaptic element still remains the critical issue that limits the memory capacity of SNNs [1, 7]. The fundamental limitation of the memory lifetime in SNNs employing memristive devices has never been investigated, despite it can provide clues for the optimisation of SNNs as a whole

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