Exposing extreme ultraviolet lithography at Intel

Abstract

In this paper we present the latest results on developing and integrating extreme ultraviolet lithography (EUVL) at Intel. The world’s first commercial EUV exposure tool was installed in Intel’s development fab, linked to a resist track, and had successfully demonstrated key tool specifications by the end of 2004. Exercising this micro-exposure tool (MET) is a significant step in the path toward inserting EUVL into high-volume manufacturing. Full patterning development of the small features required for the 32 nm node are enabled by coupling the high-resolution printing capability of the MET with a state-of-the-art wafer fabrication facility. Moreover, using the MET in a fab environment assists in the identification and resolution of issues associated with the novel aspects of EUVL. We are actively using this tool to study EUV resists, novel processing, and masks. Results of these studies are presented here. Data include imaging performance for both line-space and contact hole patterns on relevant substrates, early etch results, and a mask defect printability study.