Experimental Validation of a Chaotic Jerk Circuit Based True Random Number Generator

Abstract

A method for true random number generation by directly sampling a high frequency chaotic jerk circuit is explored. A method for determination of the maximum Lyapunov exponent, and thus the maximum bit rate for true random number generation, of the jerk system of interest is shown. The system is tested over a wide range of sampling parameters in order to simulate possible hardware configurations. The system is then implemented in high speed electronics on a small printed circuit board to verify its performance over the chosen parameters. The resulting circuit is well suited for random number generation due to its high dynamic complexity, long term aperiodicity, and extreme sensitivity to initial conditions. This system passes the Dieharder RNG test suite at 3.125 Mbps.