Abstract
Many engineering fields, such as automotive, aerospace, and the emerging challenges towards industry 4.0, have to deal with Real-Time (RT) or Hard Real Time (HRT) systems, where temporal constraints must be fulfilled, to avoid critical behaviours or unacceptable system failures. For this reason, estimation of code's Worst-Case Execution Time (WCET) has received lots attention because in RT systems a fundamental requirement is to guarantee at least a temporal upper bound of the code execution for avoiding any drawbacks. However, until now there is no approved method to compute extremely tight WCET. Nowadays, indeed, HRT requirements are solved via hardware, using multi-cores embedded boards that allow the computation of the deterministic Execution Time (ET). The availability of these embedded architectures has encouraged the designers to look towards more computationally demanding optimal control techniques for RT scenarios, and to compare and analyze performances also evaluating a tight WCET. However, this area still lacks deep investigations. This paper has the intent of analysing results regarding the choice between three of the most established optimal controls (LQR, MPC, SDRE), providing the first link between WCET analysis and control algorithms performances. Moreover, this work shows how it is also possible to obtain a minimal ET solution for the nonlinear SDRE controller. The results might be useful for future implementations and for coping with Industry 4.0 emerging challenges. Furthermore, this approach can be useful in control system engineering field, especially in the design stage for RT or HRT systems, where temporal bounds have to be fulfilled jointly with all the other application's specifications.
Highlights
The embedded hardware systems used for control applications are becoming more and more performing to meet the growing needs, in terms of computational performances, required by the increasing complexity of control tasks, for which they are appointed in real-world applications
Hard Real Time (HRT) requirements can be solved via hardware, using multicores embedded boards that allow the computation of the deterministic Execution Time (ET)
This paper aims to propose a novel approach to evaluate control techniques by a thorough analysis of both the computational performances and the Worst-Case Execution Time (WCET) of the optimal control algorithms taking into account the already well-known validated implementations
Summary
The embedded hardware systems used for control applications are becoming more and more performing to meet the growing needs, in terms of computational performances, required by the increasing complexity of control tasks, for which they are appointed in real-world applications. HRT requirements can be solved via hardware, using multicores embedded boards that allow the computation of the deterministic Execution Time (ET) In these boards, the running task is considered on a single thread, there is no CPU scheduling and each routine has a dedicated core. There are different companies specialized in HRT embedded boards, amongst them, a few years ago the benefits of XMOS technology have been pointed out in comparing with other boards [7] This allows us to calculate with deterministic certainty, the Best Case Scenario (BCS) and Worst Case Scenario (WCS) with native tools by the workbench.
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