Abstract
Advanced process control in lithography and overall patterning is of tremendous importance for advanced semiconductor Fabs to ensure chip performance and yield. The final patterning result and thus yield depend on many process parameters such as lithography processes, exposure tool performance, etch process, CMP etc. To control these effects various knobs, e.g. on the scanner for both wafer inter- and intra-field process control have been introduced recently, including sophisticated in-line metrology.In this holistic lithography concept the metrology is supported by simulation and by inline data. Additionally, offline data such as the mask CDU data can be added as mask wafer interaction is also an important contribution to wafer intra-field performance. The metrology algorithm now looks for such locations where the simulation finds the weakest process features due to strong deviations of focus, dose, stage dynamics or other input parameters. These concepts are optimized to find the sites where the process may break. Our concept of “excursion preventions” is a complimentary approach. It concentrates pro-actively on the task to minimize the distributions of critical input parameters as much as possible, independently upon a certain pre-defined specification for that parameter is met or not. In our presentation, we will describe this concept by improving wafer intra-field CDU using CD Correction (CDC) by MaskTuning (based on wafer Intra-Filed data). Mask Tuning by the For Tune system uses ultra-short pulse laser technology to locally change the mask transmission and hence improves CDU on wafer (CDC). To ensure a save patterning with a large enough process window without any negative yield or reliability impact, our concept looks for the tail of the final CD distribution instead of traditional 3sigma numbers. By using a calibrated 3-D resist model, we simulate the pattering result under all permutations of input parameter distributions like dose, focus and mask CDU and imaging stochastics. As a result of the simulation, we get thousands of CD-results. The tail of that CD distribution still needs to be larger the minimum CD needed for a safe etch transfer. The simulation will be additionally supported by experimental data. Secondly, we will show in detail how the pro-active optimization of wafer intra-field CDU by MaskTuning using the For Tune CDC process will give us more patterning margin and process stability over any other process excursion (e.g. focus deviations). Furthermore, we will present the simulated yield improvement based on the weak points (hot spots) improvement.
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