Abstract

Over the course of the past three decades, we have witnessed dramatic changes in our lifestyles. This is attributed to an unprecedented revolution of information technology (IT). The key element of the IT revolution is the continuing advancement of semiconductor technology. A major driving force of semiconductor technology lies in silicon. The silicon semiconductor has been applied to logic chips as well as memory chips for various applications. Meanwhile, the silicon memory has been at the center of an ongoing battle to manufacture the smallest, highest density, and most innovative product. Since their invention in the early 1970s, silicon memory devices have advanced at a remarkable pace. Silicon based memories such as dynamic random access memory (DRAM), static random access memory (SRAM), and Flash memory have been crucial elements for the semiconductor chip industry in the areas of density, speed, and nonvolatility, respectively. An important growth engine is scaling, which has enabled multiple devices to be integrated within a given area, resulting in an exponential increase in density and a decrease in bit-cost (Moore, 1965). The traditional scaling approach, however, is now confronting physical and technical challenges toward the end-point of the international technology roadmap for semiconductors (ITRS), indicating that the revenue from downscaling will diminish as scaling slows. Thus, an entirely new concept is required to ensure that silicon memory technology remains competitive. To meet this stringent requirement, this chapter will exploit a new paradigm of memory technology. An ideal memory device should satisfy three requirements: high speed, high density, and nonvolatility. Unfortunately, a memory satisfying all requirements has yet to be developed. Memory devices have consequently been advanced by pursuing just one of these virtues, and appear in many different forms. SRAM dominates high speed on-chip caches for advanced logic and DRAM occupies applications for high-density and high-speed computation; but DRAM’s data is volatile, and Flash memory is widely used for high density and non-volatile data storage. Therefore, if a single memory transistor can process different memory functions, a paradigm shift from ‘scaling’ to ‘multifunction’ can continue the evolution of silicon technology. In this chapter, the prototype of the fusion memory, named unified-random access memory (URAM), is introduced that can simplify device architecture, reduce power consumption, increase performance, and cut bit-cost.

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