Abstract

The general reduction in the thicknesses of critical dielectric layers driven by Moore’s law scaling has led to increasingly more manageable total-ionizing-dose (TID) response over the last ~50 years. Effects of oxide, interface, and border traps in MOS gate oxides on TID response are now mostly well known for SiO2 gate dielectrics, and the leakage currents due to isolation oxides can be conservatively bounded with existing test methods. Radiation hardened and/or radiation-tolerant technologies have been developed that can survive doses that exceed 1 Mrad(SiO2). Advances in computing technology enabled by Moore’s law scaling and concomitant enhancements in computational techniques have greatly facilitated the modeling and simulation of TID effects in microelectronic devices and ICs. However, the TID response of nanoscale MOS devices with advanced gate stacks and high- ${K}$ gate dielectrics, and/or alternative materials to Si, is often more complex than for MOS devices with SiO2 gate oxides. TID challenges remain for linear bipolar technologies that exhibit enhanced low-dose-rate sensitivity and for microelectronic devices that must function at doses above ~100 Mrad(SiO2), e.g., in high luminosity accelerator environments. TID effects have also recently been observed in wide bandgap semiconductor devices (e.g., GaN/AlGaN HEMTs) with no gate oxide.

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