Abstract
Flip chip (FC) packaging is gaining acceptance in the electronics packaging arena. More sources of bumped die and high density PWB laminates are becoming available, known good die (KGD) issues are being resolved by several companies, and design tools to perform FC packaging design are becoming more readily available. This is the infrastructure FC packaging requires to become the packaging method of choice, specially for >200 I/O applications. FC packages come in a variety of styles: FC plastic ball grid arrays (FC/PBGAs), FC plastic quad flat packs (FC/PQFPs), etc. At present, the industry's drive is towards single chip packages on low cost laminates, i.e. organic substrates. Work is beginning in the area of multichip FC packages, due to the need to increase memory to microprocessor communication speed. In this article, we discuss a unique FC/MCM-L package. We begin with the development and reliability testing of a one to four chip leadless FC/MCM-L package. Unlike traditional surface mount components, which are attached to PWBs with leads, the SMT pads within the package body are used for attachment to a PWB. Collapsible eutectic solder domes are deposited on the SMT pads by screen printing. After reflow, these domes are used to connect the FC/MCM-L to the PWB. Challenges encountered during package design, PWB fabrication, and first and second level assembly are discussed. The second part of this paper focuses on the extension of this FC/MCM-L package to a ball grid array (BGA) second level interconnect. Change of FC attachment method, design enhancements, assembly and reliability testing results are presented.
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