Evaluation of Soft-Error Tolerance by Neutrons and Heavy Ions on Flip Flops With Guard Gates in a 65-nm Thin BOX FDSOI Process

Abstract

We evaluated soft-error tolerance by neutrons and heavy ions on four types of flip flops (FFs) called D-type flip flop (DFF), guard-gate FF (GGFF), feedback recovery FF (FRFF), and dual FRFF (DFRFF) in a 65-nm thin buried oxide (BOX) fully depleted silicon on insulator (FDSOI). FRFF has a guard-gate structure only in the master latch. GGFF and DFRFF have the guard-gate structure in both master and slave latches. The guard-gate structure resolves a single-event transient (SET) pulse by delaying it through the guard gate. FRFF and DFRFF have smaller area and shorter delay overheads than GGFF. We revealed that the guard-gate structure has high soft-error tolerance by low-linear energy transfer (LET) heavy ions, but the larger-LET ions over 40 MeV-cm2/mg cause upset even in the guard-gate structures. We revealed that longer delay in the guard-gate can resolve these issues by circuit simulations.