Abstract
This paper describes the application of the Object-Oriented Design of Reliable/Reconfigurable Architectures (OODRA) workbench to the performance simulation of an adaptive digital beamforming architecture. The performance effects due to chip partitioning and reconfiguration for fault tolerance and yield enhancement are presented. The experiments described illustrate the flexibility of the OODRA work-bench in architectural-level performance evaluation of algorithm-specific reconfigurable architectures.
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