Abstract

An experimental method, the thermally stimulated bias stress (TSBS) method, is presented to evaluate the stability of amorphous silicon thin film transistors (TFTs). TSBS experiment monitors the drain currents under constant gate bias while increasing the temperature at a constant rate. The changes of the drain current during TSBS experiment are analyzed by numerical calculation, adopting the conventional stretched exponential formula which describes the degradation behavior of TFT under bias stress at constant temperature. The TFT stability is characterized by stretched exponential parameters Eτ and T0, which are related to the effective barrier height and the width of the distribution of barriers for bias induced degradation. For +20 V gate bias stress, Eτ=0.88 eV and T0=850 K are obtained. Higher bias stress lowers the effective barrier height Eτ. For three different cases of the initial state of a TFT (annealed, light soaked, and bias stressed), stabilities are investigated by TSBS method. For the initially light soaked case, parameters Eτ and T0 are about the same as those of the annealed case. But for the initially bias stressed case, Eτ increases and T0 decreases. We discuss the effects of gate bias and initial treatment on the bias induced instabilities in terms of charge trapping and defect creation models.

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