Evaluation and characterization of approximate arithmetic circuits

Abstract

SummaryWith the end of Dennard's scale, processor designers have been looking for new technical alternatives so that approximate computing (AC) has managed to attract the attention of researchers by offering techniques ranging from the application level to the circuit level. When applying approximate circuits into hardware design, the program user may speed up the application. At the same time, a designer may save area and power dissipation at the cost of less accuracy on the results of operations. This article discusses the compromise between controlled accuracy versus physical efficiency by evaluating a set of arithmetic circuits designs. The article also presents new mixed organization approximate designs. To evaluate the approximate design benefits, we performed a comprehensive set of experiments from tailor‐made approximate arithmetic circuits on field‐programmable gate array and application specific integrated circuits technologies. Our results reveal that our proposed mixed approximate designs have promising results on error rates, area usage, and power dissipation compared to the related work. Another interesting result is that one should care about the prototyping platform where the approximate hardware will be synthesized. Tailor‐made approximate cells may take advantage on intrinsic design details than standard cells or even general prototyping platforms.