Eutectic Sn/Pb solder bump cracking issue of large-die flip chip ball grid array (FCBGA) package with electroless Ni/immersion au (ENIG) build-up substrate

Abstract

The study is aimed at uncovering the root cause of brittle failure on large-die FCBGA packages built with electroless Ni/immersion Au (ENIG) plated build-up substrate. The failure was resultant from interfacial cracks between Sn/Ni inter-metallic layer and Ni(P) layer of eutectic Sn/Pb bump joints near die edge. Detailed metallurgical analysis shows the affected substrate exhibits over-etch phenomenon at Ni nodules, which is consistent as black pad effect that the industry has studied. Non-linear finite element analysis conducted on two large-die FCBGA structures with different performances in bump cracking proves the effect of bump array design on stress distribution: Sparse bump array layout and/or large depopulated bump array design would significantly increase the stress at those critical bump joints due to the reduced bump population density. An alternative surface finish finish, bare copper with a coated solder, was also evaluated for its propensity for brittle fracture and compared with ENIG finish that did not contain any evidence of black pad. This was done by applying a mechanical twisting test for assembled flip chips. After the destructive test, 66% ~ 73% bumps per die failed at the bump/substrate interface for the assemblies made on substrates with an ENIG surface finish, all in brittle fracture mode. In contrast, on substrates with Cu-SOP pad finish, almost 100% of the bumps per die broke at die/bump interface, rather than bump/substrate interface. Even on those few bumps broken at bump/substrate interface, the failure mode was found either ductile mode or pad peel-off. This result indicated superior interfacial fracture strength for Cu-SOP surface finish as compared to ENIG surface finish