ESSAY FIVE - The RISC Movement in Processor Architecture

Abstract

Listen

Translate article

This chapter discusses the RISC movement in processor architecture. The public debate that led to the RISC movement began with the publication, in the May 1980 issue of Computer Architecture News, of a paper by David Patterson and David Ditzel entitled The Case for the Reduced Instruction Set Computer. Atypical RISC computer contains a register file—commonly containing 16 or 32 registers— and an ALU, in which arithmetic and logical operations can be performed. Instructions fall mainly into two classes: (1) instructions that transfer words from the memory to a register or from a register to the memory, and (2) instructions that pass words from one or two of the registers through the ALU and put the result back into a register. A RISC instruction set is simple enough to be readily implemented without a micro program. This is an advantage in itself as hard-wiring is always faster. A weakness, recognized from the beginning, is that the density of code in a RISC computer is inevitably less than in a conventional computer. In other words, RISC programs take up more space in the memory. The engineers who pioneered the RISC movement had one advantage over their predecessors who designed the earlier instruction sets. In the interval, simulation techniques had matured, and the computer power needed for their exploitation had become readily available.