Abstract
For high-voltage (HV) application, an on-chip ESD protection solution has been proposed in a 0.25-μm HV BCD process by using low-voltage (LV) p-type devices with the stacked configuration. Experimental results in silicon chip have verified that the proposed design can successfully protect the 60-V pins of a battery-monitoring IC against over 8-kV human-body-mode (HBM) ESD stress.
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