ESD Breakdown of Parylene OFETs With Varying Contact Overlap Capacitance

Abstract

We examine the electrostatic discharge (ESD) behavior of bottom-gate bottom-contact pentacene organic field-effect transistor (OFET) devices with a parylene-C gate dielectric. A comparison between devices with gate and contact overlap geometries of −2 to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3~\mu \text{m}$ </tex-math></inline-formula> are analyzed. In particular, the relationship between contact overlap, the protective effect of the increased overlap, and the electric field in the dielectric and their effect on ESD resilience is detailed. We find a markedly increased tolerance for negative contact overlaps and a small decrease in tolerance for more positive overlaps. We also report on a highly resilient effect where OFET devices continue to operate but with a reduction in performance after multiple dielectric breakdown. A negative overlap length should be carefully considered when designing OFET devices in a tradeoff between decreased performance and higher ESD resilience.