Error-Prediction LDPC and Error-Recovery Schemes for Highly Reliable Solid-State Drives (SSDs)

Abstract

Highly reliable solid-state drives (SSDs) with error-prediction low-density parity-check (EP-LDPC) and error-recovery schemes are proposed. Since the reliability of the nand flash memory of the SSD is seriously degraded as the scaling, the conventional error-correction scheme is becoming useless. Thus, LDPC error-correcting code (ECC) is considered to be the next-generation ECC for SSD. However, many read cycles are required and the LDPC scheme consumes an unacceptably long read time. To solve this problem, the proposed EP-LDPC scheme realizes the 7 × fewer sequential read cycles than the conventional LDPC scheme. Instead of reading repeatedly, the EP-LDPC scheme estimates errors from VTH, write/erase cycles, data-retention time, and inter-cell coupling information. The bit error rate (BER) estimation is based on the prerecorded table which stores the relations among write/erase cycles, data-retention time, neighboring cell data, and BER. As a result, the acceptable data-retention time of the SSD increases by more than 10 ×. Additionally, the proposed error-recovery scheme is executed and reduces the bit error if the BER of the data exceeds the error-correction capability of EP-LDPC scheme. Program-disturb error-recovery pulse and data-retention error-recovery pulse reduce the BER of the nand flash memory by 76% and 56%, respectively.